Job summary
Job post source
This job is directly from TetraMem - Accelerate The World
Job overview
The ASIC/SoC Design Verification Engineer role at TetraMem involves leading the verification of SoC designs to ensure functionality and performance, impacting product quality and reliability.
Responsibilities and impact
The engineer will collaborate with design teams to create and implement test plans, develop verification infrastructure and testbenches, manage regression strategies, debug simulation failures, support post-silicon validation, and mentor junior engineers to enhance verification efficiency.
Compensation and benefits
The position offers a salary range from $110,000 to $300,000 per year; no additional benefits are specified.
Experience and skills
Candidates must have an MS with 8+ years or a PhD with 3+ years in relevant fields, deep knowledge of verification methodologies like UVM/OVM, proficiency in multiple programming languages and scripting, familiarity with bus protocols and core architectures, and experience in RTL and gate-level verification; experience with AI/ML computing, mixed-signal design, and high-speed IO verification is a plus.
Work environment and culture
The role requires adaptability to a startup environment, emphasizing independent work and teamwork with technical leadership responsibilities.
Unique job features
The job involves advanced verification techniques for SoC designs including automation, coverage closure, and post-silicon validation support, highlighting a technically challenging and leadership-oriented position.
Company overview
TetraMem, headquartered in Fremont, California, is a privately held company specializing in computer hardware. The company focuses on developing next-generation technologies and is recognized for its work in the PC hardware sector. TetraMem generates revenue through the design and sale of advanced hardware solutions, catering to a variety of engineering roles such as ASIC/SoC design and verification, circuit modeling, and embedded software development. As a fast-growing, venture-backed startup, TetraMem is well-funded and actively hiring to expand its innovative team.
How to land this job
Tailor your resume to emphasize your expertise in SoC design verification, highlighting experience with UVM/OVM, semiformal and assertion-based verification, and your proficiency in developing reusable testbenches and verification infrastructure.
Focus on showcasing your skills in scripting languages like Python, Perl, TCL, and your knowledge of hardware/software co-verification methodologies, as well as familiarity with protocols such as MIPI, AMBA, and ISAs like RISC-V or ARM.
Apply through multiple channels including TetraMem's corporate careers page and LinkedIn to maximize your application's reach and visibility for the ASIC/SoC Design Verification Engineer role.
Connect with current engineers and team leads in the design verification or SoC divisions at TetraMem on LinkedIn; use ice breakers like referencing recent TetraMem projects, expressing enthusiasm about their innovation in AI/ML computing or high-speed IO verification, or asking about their experience working in a startup environment.
Optimize your resume for ATS by incorporating keywords from the job description such as 'SoC design verification,' 'UVM/OVM,' 'testbench development,' 'coverage closure,' and specific scripting languages to ensure your resume passes automated screenings.
Leverage Jennie Johnson's Power Apply feature to automate multi-channel applications, tailor your resume with relevant keywords, and identify LinkedIn connections for networking, allowing you to focus your time on interview preparation and skill enhancement.
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