d-Matrix

FPGA Design Engineer, Staff

SANTA CLARA, CAPosted a month ago

Job summary

  • Job post source

    This job is directly from d-Matrix as the description explicitly states they do not accept resumes from external agencies and request direct applications.

  • Job overview

    The FPGA Design Engineer, Staff at d-Matrix is responsible for designing and verifying FPGA-based solutions to support AI inference accelerator management, contributing to the advancement of generative AI technology.

  • Responsibilities and impact

    The role involves designing FPGA microarchitecture, developing dual boot architecture, implementing power management and telemetry modules, interfacing with host server BMC, integrating RISC-V cores, developing secure boot solutions, collaborating with cross-functional teams, and authoring Python scripts for hardware testing and automation.

  • Experience and skills

    Candidates should have a Bachelor's degree in Electrical or Computer Engineering with 9+ years of FPGA design and verification experience, expertise in HDLs like Verilog or VHDL, familiarity with RISC-V and embedded systems, knowledge of management protocols (MCTP, PLDM, SPDM), power management, hardware security, and scripting in Python.

  • Work environment and culture

    d-Matrix promotes a culture of respect, collaboration, humility, and inclusivity, valuing diverse perspectives and direct communication in a dynamic environment focused on innovative problem-solving.

  • Company information

    d-Matrix is a company focused on generative AI software and hardware innovation, aiming to transform technology with cutting-edge AI accelerator solutions.

  • Job location and travel

    The position is hybrid, requiring onsite work three days a week at the Santa Clara, CA headquarters.

  • Application process

    Applicants must apply directly through d-Matrix's official channels as the company does not accept submissions from external recruitment agencies.

  • Unique job features

    The job offers unique opportunities to work on advanced AI inference accelerator FPGA designs, including secure boot adhering to NIST standards and integration of RISC-V cores, within a collaborative and innovative environment.

Company overview

d-Matrix is a cutting-edge technology company specializing in developing advanced artificial intelligence (AI) hardware and software solutions. They make money by designing and selling high-performance AI accelerators and integrated systems that enhance computational efficiency for data centers and enterprise applications. Founded in 2019, d-Matrix has quickly gained recognition for its innovative approach to AI infrastructure, leveraging proprietary technology to deliver superior performance and energy efficiency. Their products are pivotal for industries requiring robust AI capabilities, such as autonomous vehicles, healthcare, and financial services.

How to land this job

  • Tailor your resume to emphasize your extensive experience in FPGA design and verification, highlighting proficiency in Verilog or VHDL and your familiarity with RISC-V architecture and embedded systems development.

  • Highlight your skills in hardware-software integration, secure boot solutions adhering to NIST standards, and experience with management protocols like MCTP, PLDM, and SPDM to align with d-Matrix's technical requirements.

  • Apply through multiple channels including d-Matrix's official corporate careers page and LinkedIn job postings to maximize your application visibility for the Staff FPGA Design Engineer role.

  • Connect with current employees in the FPGA or AI hardware divisions at d-Matrix on LinkedIn; use ice breakers such as commenting on d-Matrix's innovative AI accelerator projects or asking about their experience with hybrid work culture and collaboration.

  • Optimize your resume for ATS by incorporating keywords from the job description such as 'FPGA design,' 'Verilog,' 'VHDL,' 'RISC-V,' 'secure boot,' and 'hardware-software integration' to ensure it passes automated screening effectively.

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