Application Specific Integrated Circuit Design Engineer

SAN JOSE, CAPosted 30+ days ago

Job summary

• Job post source

  This job is directly from eInfochips (An Arrow Company)

• Job overview

  The position is for a Senior ASIC Design Engineer at eInfochips, focusing on RTL coding and FPGA design to contribute to advanced semiconductor projects.

• Responsibilities and impact

  Daily tasks include mapping SoC designs onto prototyping platforms, establishing prototyping systems, and collaborating with various teams to validate design objectives.

• Compensation and benefits

  The role offers competitive financial compensation, medical, dental, vision insurance, 401k with matching contributions, paid time off, and tuition reimbursement.

• Experience and skills

  Candidates should have a bachelor's degree in electrical or computer engineering and at least 8-10 years of relevant experience in ASIC design, with expertise in FPGA design and RTL coding.

• Career development

  There are growth opportunities within the company, including potential advancements in product engineering and semiconductor design.

• Work environment and culture

  eInfochips promotes a culture of innovation and collaboration, supported by its strategic partnerships and a commitment to technological advancement.

• Company information

  eInfochips, part of Arrow, is a leading provider of product engineering and semiconductor design services with a history of over two decades and numerous successful deployments globally.

• Team overview

  The specific team dynamics are not detailed, but collaboration with software, design, and verification teams is emphasized.

• Job location and travel

  The position is fully on-site in San Jose, CA, requiring travel to client locations as needed.

• Unique job features

  The role offers the option to engage in block-level RTL design or IP integration, along with the opportunity to work on advanced prototyping platforms.

Company overview

eInfochips, a subsidiary of Arrow Electronics, specializes in product engineering and semiconductor design services. They generate revenue by providing end-to-end solutions in areas such as IoT, AI, and cloud computing, catering to industries like aerospace, automotive, and healthcare. Founded in 1994, eInfochips has grown significantly, leveraging Arrow's global distribution network to enhance its service offerings and market reach. Notably, their expertise in cutting-edge technologies and robust client portfolio make them a prominent player in the engineering services domain.

How to land this job

• Position your resume to showcase your extensive experience in RTL coding using Verilog, emphasizing your proficiency with FPGA platforms and synthesis/builds/P&R, as these are critical for the Senior ASIC Design Engineer role at eInfochips.

• Highlight your knowledge of digital design concepts, particularly Clock Domain Crossing and Reset Domain Crossing, as well as your ability to partition multi-million gate SoC designs, since these skills are essential for the position.

• Apply through multiple channels such as eInfochips' corporate site and LinkedIn to maximize your visibility and opportunities for this role.

• Connect with professionals in the ASIC design division at eInfochips on LinkedIn to inquire about the position, using ice breakers like discussing recent advancements in FPGA technology or asking about their prototyping methodologies.

• Optimize your resume for ATS systems by incorporating keywords from the job description such as 'FPGA design', 'RTL coding', and 'synthesis', ensuring your application passes initial screenings.

• Consider using Jennie Johnson's Power Apply feature, which can efficiently tailor your applications, identify key networking opportunities, and streamline your job search process, allowing you to focus on landing the job at eInfochips.